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The Silicon Drift Detectors

SIDDHARTA-2 — The apparatus

2. The Silicon Drift Detectors

 

Silicon Drift Detectors (SDDs) are semiconductor detectors proposed for the first time in 1983 by Paul Rehak and Emanuele Gatti [1,2]. Semiconductor detectors measure the energy of the crossing particles by the collection of the electron-hole pairs produced in the sensitive volume of the detector. The working principle of an SDD is based on the creation of a large lateral depleted zone of a p − n junction within the silicon bulk, obtained by biasing a small n+ anode with higher voltage concerning the two p+ electrodes laying on both surfaces of an n-type silicon bulk. A reverse polarization is applied to enlarge the depletion zone and to separate the electron-hole pairs. With a sufficiently high biasing voltage, both the depletion regions, separated in equilibrium conditions, join together, drastically increasing the sensitive volume of the SDD detector. A small non-depleted region is located near the n+ electrode. This operating procedure allows reaching large depletion zones by applying a bias voltage four times less than the usual ones (g.e. around 350 μm of thickness applying around 100 V) [2,3].

 

(a) A schematic reconstruction of the SDD shape and working principle is shown. (b) A sided view of the potential inside the SDD is shown.

The operating principle to create the depletion zone in the SDD is shown, comparing a usual p − n diode (a) with unbiased (b) and biased (c) Silicon Drift Detector structures [4].


                    

The SDDs installed in the SIDDHARTA-2 experiment have a thickness of 450 μm and allow the x-ray detection in the 4-40 keV energy range with high efficiency [5,6]. The SDDs are organized in 2 × 4 matrices of 5.12 cm2 each, with a 75% active area. The SIDDHARTA-2 experiment has 384 SDDs radially surrounding the cylindrical shape of the cryogenic target. The SDDs are cooled down to a temperature of about 120 K with a cryo-cooler circuit [7]. A low-noise charge sensitive preamplifier (CUBE) [8], represents the first stage of the signal processing, together with the front-end readout based on the SFERA ASIC [9,10] and includes fast and slow shapers with programmable parameters in order to improve the spectroscopic response of the system. Each SFERA chip, after processing the signals coming from two SDDs arrays, provides the charge and the timing information of the detected event to the downstream data acquisition system. The timing measurement in particular is essential to suppress the asynchronous background which originates from the accelerator [11]. The target and the SDDs are placed inside a vacuum chamber and kept at a pressure below 10-5 mbar. These pressure and temperature conditions allow high-quality performances of the SDDs, which provide a resolution of 160 eV and a detection efficiency of almost 100% at 6 keV, the energy value close which the kaonic deuterium 2p→1s transition is expected [12]. The SDDs’ energy calibration is performed with x-ray tubes emitting through high purity titanium and copper strips placed on the target cell walls. The calibration method is described in [7] and in the dedicated page.

Top left: a picture of an SDD array; Top right: A schematic view of the SDD array; Bottom: schematization of the ceramic support on which the SDD cells are mounted. Reproduced by [11]
Picture of the SIDDHARTA2 target cell surrounded by the SDD detector arrays for the x-ray spectroscopy. Reproduced by [11]
Target cell and multi elements target used for the SDD calibration. Reproduced by [7].

 

References